High speed programmable frequency divider and PLL

Details High speed programmable frequency divider and PLL High speed programmable frequency divider and PLL

1987-01-12

1989-08-08

LaRoche, Eugene R.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

377 52, 331 1A, H03K 2100

Patent

active

048560324

ABSTRACT:
A phase locked loop including a programmable frequency divider with a variable modulus divider (VMD) having two modes of operation, n and n+1, a programmable counter for counting the number of times the VMD divides the input signal and a comparator for comparing the count in the counter to a predetermined number and switching the VMD from the first mode to the second mode when the instant count and predetermined number are equal. The programmable counter provides an output pulse each time the total count equals a selected number. The VMD is a GaAs semiconductor device.

REFERENCES:
patent: 3230352 (1966-01-01), Grondin et al.
patent: 3982199 (1976-09-01), Green
patent: 4241408 (1980-12-01), Gross
patent: 4518920 (1985-05-01), Warner et al.
patent: 4606059 (1986-08-01), Oida
patent: 4633194 (1986-12-01), Kikuchi et al.
ECL Data Book, "Making Programmable UHF Counters When None Are Available or Pulse Swallowing Revisited", Fairchild Journal of Semiconductor Progress, vol. 3, No. 4.

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