Excavating
Patent
1981-01-14
1983-06-21
Atkinson, Charles E.
Excavating
364900, G01R 3126
Patent
active
043897231
ABSTRACT:
A high-speed pattern generator includes a plurality of arithmetic and logic units (ALUs) which are n in number and have m-bit outputs, n registers receptive as inputs as outputs from the ALUs, and n-bit shift registers which are m in number, each ALU and connected register being unitized and coupled to the shift registers. The outputs of the registered input data are applied to the ALUs. The unitized ALUs and registers produce outputs applied in the same sequence to bits of the shift registers, which are responsive to clock pulses to generate a pattern output at a high speed.
REFERENCES:
patent: 3564505 (1971-02-01), Finnila et al.
patent: 3930235 (1975-12-01), Kobus et al.
patent: 4293950 (1981-10-01), Shimizu et al.
patent: 5052604 (1977-10-01), Maitland et al.
Fujieda Takanori
Nigorikawa Atsushi
Yokoyama Hiroshi
Ando Electric Co. Ltd.
Atkinson Charles E.
Nippon Electric Co. Ltd.
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