High speed parallel digital adder employing conditional and look

Details High speed parallel digital adder employing conditional and look High speed parallel digital adder employing conditional and look

1975-07-03

1976-11-23

Malzahn, David H.

Registers

Transfer mechanism

Traveling pawl

G06F 750

Patent

active

039938913

ABSTRACT:
A high speed parallel digital adder/subtracter employing a specially chosen combination of "conditional" and "look-ahead" approaches which permits economically achieving high speed operation even for input operands containing relatively large numbers of digits. In a preferred embodiment, simultaneously produced look-ahead carry and carry-not signals are generated and employed to select particular ones of simultaneously generated conditional sums for one or more operand digits so as to simultaneously provide resulting digital sums which properly represent the sum of the input operands.

REFERENCES:
patent: 3316393 (1967-04-01), Ruthazer
patent: 3566098 (1971-02-01), Kono
patent: 3697735 (1972-10-01), Hanson
patent: 3700875 (1972-10-01), Saenger et al.
patent: 3805045 (1974-04-01), Larsen

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