High speed "OR" circuit configuration

Details High speed "OR" circuit configuration High speed "OR" circuit configuration

1992-09-01

1993-12-28

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307263, 307446, H03K 19003

Patent

active

052742776

ABSTRACT:
A circuit for providing an OR function on the outputs of at least two MOS logic circuits. The circuit has an output node capable of being in a first or second logic state and being responsive to a first or second path. The first path includes multiple WIRED-OR logic circuits which function as an OR gate on the outputs of MOS logic circuits. The results of the operation cause the architecture output to transition into the first state. The second path is skewed for the second state, such that the transition into the second state occurs fast. Thus, the transition of the output node from the second state to the first state and vice versa is provided by one path, such that the overall ORing function occurs faster.

REFERENCES:
patent: 4103188 (1978-07-01), Morton
patent: 4719370 (1988-01-01), Sugimoto
patent: 4866304 (1989-09-01), Yu

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