High speed operational recurring signature evaluator for digital

Details High speed operational recurring signature evaluator for digital High speed operational recurring signature evaluator for digital

1983-03-25

1985-11-05

Atkinson, Charles E.

Excavating

324 73R, 371 20, G01R 3128

Patent

active

045518378

ABSTRACT:
The high speed operational recurring signature evaluation provides digital sub-systems including a data compressor and a controller. These subsystems are employed with a portable service processor (PSP) which is a standard piece of test equipment in this art. The controller interfaces with the host logic tester (PSP) to provide the repetitious detail and complex digital control requirements for programming the data compressor in response to digital instructions received from the logic tester. A unique serial data pattern corresponding to a proper signature from a node under test generated in real time at the relatively high operating speed of the board under test is generated by the data compressor.

REFERENCES:
patent: 4125763 (1978-11-01), Drabing et al.
patent: 4183459 (1980-01-01), Donn et al.
patent: 4194113 (1980-03-01), Fulks et al.
patent: 4285059 (1981-08-01), Burlage et al.
Gordon & Nadig, Hexadecimal Signatures Identify Troublespots in Microprocessor Systems, Electronics, Mar. 3, 1977, pp. 89-96.
Nadig, Testing a Microprocessor Product Using a Signature Analysis, 1978, Semiconductor Test Conference, Cherry Hill, N.J. (31 Oct.-5 Nov. 1978) pp. 159-169.
Rhodes-Burke, Retrofitting for Signature Analysis Simplified, Hewlett-Packard Journal, vol. 33, No. 1, Jan. 1982, pp. 9-16.

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