High speed operational amplifier

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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Details

330255, 330257, 330311, H03F 345

Patent

active

046689192

ABSTRACT:
A high speed low power linear two micron CMOS operation amplifier comprises an input differential amplifier stage having feedback current mirror loads connected to a four vertically stacked transistor cascode output stage. Current domain operation of the amplifier enable fast operation through current mirror arrangements internal to the amplifier. Pass transistors of the cascode stage are dynamically biased providing the amplifier with single gain stage reducing the need for large compensation capacitors while improving the dynamic range of the output signal. The gain of amplifier is ninety decibels with a unit gain frequency bandwidth of fifty megahertz and with low power dissipation at two milliwatts.

REFERENCES:
patent: 3921090 (1975-11-01), Wheatley, Jr. et al.
Ahuja et al., "A Programmable CMOS Dual Channel Interface Processor for Telecommunications Applications", IEEE Journal of Solid-State Circuits, vol. SC-19, No. 6, Dec. 1984, pp. 892-899.
Hosticka, "Dynamic CMOS Amplifiers", IEEE Journal of Solid-State Circuits, vol. SC-15, No. 5, Oct. 1980, pp. 887-894.

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