High speed on-chip clock phase generating system

Details High speed on-chip clock phase generating system High speed on-chip clock phase generating system

1988-11-25

1991-01-29

Heckler, Thomas M.

Boots, shoes, and leggings

3649503, 364934, 3649333, G06F 112

Patent

active

049891758

ABSTRACT:
A plurality of synchronized phase generators are provided in a mainframe computer of the type having unit card each of which contain a plurality of very large scale integrated (VLSI) logic chips. Each logic chip has its own on-chip phase generator which is controlled by off-chip control signals. The on-chip phase generations each comprise output phase control gates coupled to: an on-chip start shift register, a stop shift register, clock shift registers which provide the phase of the clock, and start-stop run controls all of which are coupled to off-chip control signals and to the output phase control gates which are synchronized to eliminate distortion and skew between phase generators on different logic chips.

REFERENCES:
patent: 3355715 (1967-11-01), Harris
patent: 4034352 (1977-07-01), Hotchkiss
patent: 4398085 (1983-08-01), Benedict

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