High speed non-volatile programmable read only memory device fab

Details High speed non-volatile programmable read only memory device fab High speed non-volatile programmable read only memory device fab

1991-05-22

1993-12-21

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

With specified dopant

Switching device based on filling and emptying of deep...

257314, 257194, 257280, 257472, H01L 2968, H01L 29167, H01L 2980, H01L 29161

Patent

active

052723720

ABSTRACT:
An EEPROM cell is implemented by a field effect transistor comprising a channel layer of an intentionally undoped gallium arsenide, a carrier supplying layer formed on the channel layer and of a heavily doped n-type aluminum gallium arsenide having deep energy level, and a gate electrode formed on the carrier supplying layer, in which the deep energy level causes a current-voltage collapse phenomenon to take place due to trapping hot electrons injected from the channel layer to the carrier supplying layer in the presence of a stress voltage of about 1.2 volts between the source and drain for minimizing channel conductivity and in which the stress voltage of about 3 volts ionizes the deep energy level so as to allow recovering from the current-voltage collapse phenomenon, thereby providing the low and high channel conductivities to two logic levels.

REFERENCES:
"Semiconductors and Semimetals", vol. 24, Chapter 2, pp. 168-175 (1987).
Hagiwara et al., "A 16 kbit Electrically Erasable PROM Using n-Channel Si-Gate MNOS Technology", IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, Jun. 1980, pp. 346-353.
Johnson et al., "THPM 12.6: A 16Kb Electrically Erasable Nonvolatile Memory", 1980 IEEE International Solid-State Circuits Conference, pp. 152-153, Feb. 14, 1980.

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