High-speed multiplier to multiply a digital signal by a periodic

Details High-speed multiplier to multiply a digital signal by a periodic High-speed multiplier to multiply a digital signal by a periodic

1996-11-06

1998-10-13

Chin, Stephen

Pulse or digital communications

Receivers

375302, 364721, 364729, 327106, 327129, H03K 900

Patent

active

058223762

ABSTRACT:
Disclosed is a digital multiplication circuit to multiply a digital signal SN by a periodic waveform that is, in principle, a sine waveform. This circuit uses a phase digital generator .phi. varying in saw-toothed form and it uses an approximation of the samples of a function K sine .phi. by algebraic sums of positive integer values of two for each phase value, K being a coefficient identical for all the phase values. The product of SN by these sums is rapid and easy to obtain and does not require a sine table. A decoder receiving the phase .phi. defines the powers of two to be set up, and a routing circuit carries out the operation of multiplication by powers of two under the control of the decoder. One or two adders obtain the sums of powers of two. The result is an approximate result of the product SN.K. sine .phi..

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Robert Hawley, et al. "A Silicon Compiler for High-Speed CMOS Multirate Fir Digital Filters", Proceedings of the International Symposium on Circuits and Systems, San Diego, May 10-13, 1992, Institute of Electrical and Electronics Engineer, vol. 3 of 6, pp.(1348-1351), May 10, 1992.
Loke K. Tan, et al. "A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 um CMOS", IEEE Journal of Solid-State Circuits, vol. 30, No. 3, pp. (193-200), Mar., 1995.

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