High speed multiplier logic circuit

Details High speed multiplier logic circuit High speed multiplier logic circuit

1974-01-16

1976-04-13

Atkinson, Charles E.

Registers

Transfer mechanism

Traveling pawl

G06F 738

Patent

active

039506363

ABSTRACT:
A 4 .times. 4 multiplier uses four bit threshold logic type adders. The multiplier per se is arranged in a carry save configuration with first level pseudo type carry-look ahead with the highest weight bit of the product being accomplished by a wired OR connection. The four bit adder itself provides two double threshold detectors responsive to logic levels provided by a level shifter which shifts the logical voltage levels produced by a differential amplifier which sums the four inputs of the adder circuit. This provides the sum output; an additional double threshold detector provides the first carry output and a typical threshold AND gate the second carry output.

REFERENCES:
patent: 3278732 (1966-10-01), Haynes
patent: 3407290 (1968-10-01), Atrubin
patent: 3524977 (1970-08-01), Wang
patent: 3691359 (1972-09-01), Dell et al.
patent: 3720821 (1973-03-01), Heightley
patent: 3752971 (1973-08-01), Calhoun et al.
patent: 3761698 (1973-09-01), Stephenson
patent: 3878985 (1975-04-01), Ghest et al.
Wallace; "A Suggestion for a Fast Multiplier", IEEE Transactions on Electronic Computers; Feb. 1964, pp. 14-17.
Larson; "High-Speed Multiply Using Four Input Carry-Save Adder", IBM Technical Disclosure Bulletin; Vol. 16, No. 7, Dec. 1973, pp. 2053-2054.
Singh et al.; "Partial Product Array for High-Speed Multiply Using Adders for Multiple Additions;" IBM Technical Disclosure Bulletin; Vol. 14, No. 1, June 1971; pp. 287-289.

Affiliated with

Also associated with

Rating

High speed multiplier logic circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High speed multiplier logic circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed multiplier logic circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-754052