High speed multiplexer and demultiplexer for pulse code channels

Details High speed multiplexer and demultiplexer for pulse code channels High speed multiplexer and demultiplexer for pulse code channels

1976-11-22

1977-12-13

Stewart, David L.

179 15AF, 179 15BS, H04J 304

Patent

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040630404

ABSTRACT:
For multiplexing 6 binary channels for example, two transcoders are respectively fed by the groups of input channels A, B, C and D, E, F in each of which is inserted a locking and identification word. Two three-channel frames in intermediate ternary form are thus obtained. Conversion into definitive ternary code (moment +, O, -) takes place at the same time as the interlacing, moment by moment, of the two three-channel frames. The demultiplexer groups the moments pertaining to one and the same three-channel frame for transcoding. The system allows high speed multiplexing.

REFERENCES:
patent: 3569631 (1971-03-01), Johannes
patent: 3571516 (1971-03-01), Ohyama
patent: 3689697 (1972-09-01), Smith
patent: 3872257 (1975-03-01), Bleickardt
Review of the Electrical Communication Laboratories; vol. 20, No. 9-10; "An Experimental Broadband PCM Multiplexer-Demultiplexer" by Kozuka.
Proceedings of the IEEE 1972 on Communications; "High Speed up-to-400/800 Mb/S Digital Multiplexers" by Kawashima et al.

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