High speed multiple determination apparatus

Details High speed multiple determination apparatus High speed multiple determination apparatus

1998-05-07

2000-10-24

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708650, G06F 752

Patent

active

061381381

ABSTRACT:
In a multiple determination apparatus for determining whether or not a dividend is a multiple of a divisor which is represented by D=.alpha..multidot.2.sup.r where .alpha. is an odd number and r is 0, 1, 2, . . . , a non-zero determination circuit determines whether or not a remainder of a division of the dividend by 2.sup.r is zero. A selector circuit replaces a first number with a quotient of the division. An operational circuit determines whether or not a greatest common measure between .alpha. and the first number coincides with .alpha., when the remainder is zero. Thus, it is determined that the dividend is a multiple of the divisor when the greatest common measure coincides with .alpha..

REFERENCES:
patent: 5381380 (1995-01-01), Yoshida
patent: 5485414 (1996-01-01), Yao et al.
patent: 5638314 (1997-06-01), Yoshida
patent: 5818745 (1998-10-01), Sheaffer
patent: 5903486 (1999-05-01), Curtet

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