High speed multi-port serial-to-PCI bus interface

Details High speed multi-port serial-to-PCI bus interface High speed multi-port serial-to-PCI bus interface

2006-02-28

2006-02-28

Dinh, Dung C. (Department: 2153)

Electrical computers and digital processing systems: multicomput

Computer-to-computer protocol implementing

Computer-to-computer handshaking

C370S229000

Reexamination Certificate

active

07007099

ABSTRACT:
An HDLC formatter and a message processing core exchange messages over a high speed message exchange interface. The interface includes a memory shared by the HDLC formatter and the message processing core. A handshaking arrangement is used to coordinate message storage and retrieval in the shared memory by the HDLC formatter and the message processing core with minimal utilization of processing resources of the message processing core. This handshaking coordination, together with the use of a message buffer accessed by the HDLC formatter to buffer channelized messages exchanged with the message processing core, facilitates message processing on multiple serial links (e.g., 3) over multiple timeslots (e.g., 256).

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