High speed memory access system for a microcontroller with direc

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395309, 39542108, 3642328, 3642405, 364251, 364DIG1, G06F 1200

Patent

active

055949134

ABSTRACT:
A microcontroller which directly drives a memory with low order address bits during a fetch operation. Driving the low order address bits directly while the high order bits are latched during an address/data multiplex on the same pins allows the latch enable cycle to be skipped during sequential fetches. A sequential address detector indicates when the latch enable cycle can be skipped.

REFERENCES:
patent: 4727481 (1988-02-01), Aguille et al.
patent: 4803621 (1989-02-01), Kelly
patent: 4992979 (1991-02-01), Aichelman, Jr. et al.
patent: 5243701 (1993-09-01), Muramatsu et al.
patent: 5253350 (1993-10-01), Foster et al.
patent: 5321398 (1994-12-01), Ikeda

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