High-speed magnitude comparator circuit

Details High-speed magnitude comparator circuit High-speed magnitude comparator circuit

1992-08-17

1994-01-25

Zazworsky, John

Communications: electrical

Digital comparator systems

36518901, 36523001, G05B 103, G06F 702

Patent

active

052819469

ABSTRACT:
A high-speed magnitude comparator circuit (30) receives two n-bit operands and provides first and second signals for each bit position. The first signal is a logical OR of a complement of a corresponding bit from the first operand and a corresponding bit from the second operand; the second signal is a logical AND of a complement of the corresponding bit from the first operand and the corresponding bit from the second operand. The second signal corresponding to the least-significant bit position is formed differently, as the logical OR of a complement of the least-significant bit of the first operand and the least-significant bit of the second operand. These signals are then provided to pullup (34) and pulldown (35) columns of transistors to determine the results of the comparison in parallel. Thus, the operands need only propagate through three logic levels to provide the result.

REFERENCES:
patent: 3622987 (1971-11-01), Borkan
patent: 3656109 (1972-04-01), Conway
patent: 4450432 (1984-05-01), Schmidtpott et al.
patent: 4479217 (1984-10-01), Philippides
patent: 4728927 (1988-03-01), Aman
patent: 5003286 (1991-03-01), Carbonaro et al.

Affiliated with

Also associated with

Rating

High-speed magnitude comparator circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed magnitude comparator circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed magnitude comparator circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-730904