High-speed low-power supply-independent TTL compatible input buf

Details High-speed low-power supply-independent TTL compatible input buf High-speed low-power supply-independent TTL compatible input buf

1991-02-21

1992-02-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, H03K 190175

Patent

active

050916629

ABSTRACT:
A TTL compatible CMOS high-speed lower-power supply-independent input buffer has a first current mirror which supplies current to a reference node of the input buffer when the signal at the input node of the buffer goes to a high state. An MOS transistor has its gate connected to the input node and switches hard on when the input node goes to a high level, pulling the reference node to a low level. A second current mirror is provided which injects current into the reference node for a predetermined period of time after the voltage level at the input of the buffer goes to a low level to pull the reference node to a high level. Both the first and second current mirror are switched on only during transition states of the input buffer, to minimize power dissipation when the input buffer is in its quiescent state.

REFERENCES:
patent: 4716320 (1987-12-01), McAdams
patent: 4734592 (1988-03-01), Essig et al.
patent: 4752703 (1988-06-01), Lin
patent: 4804871 (1989-02-01), Walters, Jr.
patent: 4825110 (1989-04-01), Yamaguchi et al.
patent: 4885479 (1989-12-01), Oritani
patent: 4897560 (1990-01-01), Saito et al.
patent: 4904884 (1990-02-01), O'Shaughnessy et al.

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