High speed, low power non-return-to-zero/return-to-zero...

Details High speed, low power non-return-to-zero/return-to-zero... High speed, low power non-return-to-zero/return-to-zero...

2011-07-05

2011-07-05

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from nrz codes

C341S068000

Reexamination Certificate

active

07973681

ABSTRACT:
A gating logic receives a non-return-to-zero (NRZ) input signal and couples the NRZ input signal as an NRZ output signal when operating in a NRZ mode of operation and converts the NRZ input signal to a return-to-zero (RZ) output signal when operating in a RZ mode of operation. A circuit coupled to the gating logic receives a clock signal and couples the clock signal to the gating logic to convert the NRZ input signal to the RZ output signal in the RZ mode of operation. In the NRZ mode of operation, the circuit decouples the clock signal and places a predetermined signal state at the gating logic to pass through the NRZ input signal as the NRZ output signal. The circuit receives a select signal to select between the NRZ and RZ modes of operation and the NRZ and RZ modes are obtained by controlling the clock signal to the gating logic.

REFERENCES:
patent: 2005/0243454 (2005-11-01), Igaki et al.
patent: 2006/0285853 (2006-12-01), Murai
patent: 2007/0274732 (2007-11-01), D'Errico et al.
patent: 2008/0198939 (2008-08-01), Nakasha et al.
patent: 2009/0080465 (2009-03-01), Yang et al.
“A Novel 50-Gbit/s NRZ-RZ Converter with Retiming Function Using InP HEMT technology”; Toshihide Suzuki et al.; Fujitsu Laboratories Ltd.; CSIC 2005 Digest; 2005.

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