High speed, low power input buffer

Details High speed, low power input buffer High speed, low power input buffer

1989-06-23

1991-08-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307542, 307475, 307363, H03K 19013

Patent

active

050398814

ABSTRACT:
An input buffer includes an input circuit (80), a pair of complimentary outputs (52,54) and a differential ampliifer (12). The input buffer includes a pull-down diode (90) arranged in parallel with pull-up diodes (84, 86, and 88), coupled between the buffer input (82) and the differential amplifier input (32). Pull-up is achieved through the low impedance path of the pull-up diodes, eliminating a need for a high value resistor. Pull-down is achieved through the pull-down diode in series with a resistor (92). This arrangement provides high speed of operation, while reducing current consumption.

REFERENCES:
patent: 3353106 (1967-11-01), Dudek et al.
patent: 4297593 (1981-10-01), Allen
patent: 4453095 (1984-06-01), Wrathall
patent: 4518876 (1985-05-01), Constantinescu
patent: 4533842 (1985-08-01), Yang et al.
patent: 4647799 (1987-03-01), Hsu et al.
patent: 4654549 (1987-03-01), Hannington
patent: 4678944 (1987-07-01), Williams
patent: 4698527 (1987-10-01), Masumota
patent: 4727271 (1988-02-01), Favata et al.
patent: 4749951 (1988-06-01), Tanaka
patent: 4890065 (1989-12-01), Laletin
Mukai et al, "Master Slice ECL LSI"9-73, p. 1339.

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