High speed low offset CMOS amplifier with power supply noise iso

Details High speed low offset CMOS amplifier with power supply noise iso High speed low offset CMOS amplifier with power supply noise iso

1990-11-19

1991-10-22

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

330265, H03F 330

Patent

active

050599224

ABSTRACT:
A single-ended amplifier circuit is provided combining high speed operation with low input offset characteristics while providing immunity from power supply noise for the input signal by isolating the power supply conductors from the input conductor. The first and second amplifying transistors are separated from the power supply conductors by the drain-source conduction paths of third and fourth isolation transistors operating in their linear region in response to a predetermined reference potential. Thus, any power supply noise is absorbed across the third and fourth isolation transistors thereby avoiding overwhelming a low level input signal with switching induced noise.

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