High-speed, low-noise, CMOS output driver

Details High-speed, low-noise, CMOS output driver High-speed, low-noise, CMOS output driver

1992-07-06

1994-05-17

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 307443, 307475, H03K 19003, H03K 19094

Patent

active

053131185

ABSTRACT:
A driver circuit employs an N-channel pull-down transistor of relatively small size, directly connecting an output node to ground, and another path consisting of a pair of series-connected N-channel transistors connecting the node to ground; the lower of these is driven by the logic voltage which is applied to the gate of the pull-down, and the other has its gate connected to the output node. Two parallel discharge paths are thus provided for the output node, one through the small pull-down transistor, and a second through the (larger) series transistors. When a returning wave from the output node (due to transmission line effects) hits the driver circuit, the series transistors turn off, but the pull-down transistor is still on keeping the driver output node at a valid "low." In cases of mismatch or noise, the pull-down transistor will help absorb refections or ringing. This output driver is especially adapted for small transistor sizes, producing transmission line effects at the chip-to-bus interface, because the circuitry controls overshoot and undershoot, but yet does not use on-chip series source terminations or external (off-chip) terminations). The driver circuit is less sensitive to process and temperature variations, and also less sensitive to variations in etched-conductor impedance, so is capable of driving from either the middle or end of the etched-conductor with no degradation in performance.

REFERENCES:
patent: 4782250 (1986-11-01), Adams et al.
patent: 4797579 (1993-01-01), Lewis
patent: 4963766 (1990-10-01), Lundberg

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