High-speed line interface for networking devices

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C370S539000, C370S545000

Reexamination Certificate

active

09752827

ABSTRACT:
Systems and methods, consistent with the present invention, provide a high-speed line interface for networking devices. Such an interface may be used in networking devices, such as routers and switches, for receiving data from, and transmitting data to, high-speed links, such as those lines carrying data at rates of 2.5 Gbit/sec, 10 Gbit/sec, and 40 Gbit/sec and more. In a preferred embodiment, the interface deserializes data from an incoming data stream onto a multi-line bus so that the data may be processed at a lower clock speed. Packets are extracted from the data on the multi-line bus and distributed among a plurality of switching/forwarding modules for processing.

REFERENCES:
patent: 5335325 (1994-08-01), Frank et al.
patent: 5506841 (1996-04-01), Sandquist
patent: 5710650 (1998-01-01), Dugan
patent: 5757771 (1998-05-01), Li et al.
patent: 5905725 (1999-05-01), Sindhu et al.
patent: 5909440 (1999-06-01), Ferguson et al.
patent: 5953314 (1999-09-01), Ganmukhi et al.
patent: 6009075 (1999-12-01), Roberts et al.
patent: 6092178 (2000-07-01), Jindal et al.
patent: 6122281 (2000-09-01), Donovan et al.
patent: 6263368 (2001-07-01), Martin
patent: 6272522 (2001-08-01), Lin et al.
patent: 6324580 (2001-11-01), Jindal et al.
patent: 6327622 (2001-12-01), Jindal et al.
patent: 6359900 (2002-03-01), Dinakar et al.
patent: 6385209 (2002-05-01), Skirmont et al.
patent: 6404752 (2002-06-01), Allen, Jr. et al.
patent: 6424621 (2002-07-01), Ramaswamy et al.
patent: 6446146 (2002-09-01), Yamaguchi et al.
patent: 6601084 (2003-07-01), Bhaskaran et al.
patent: 6636515 (2003-10-01), Roy et al.
patent: 6643719 (2003-11-01), Baker
patent: 6646983 (2003-11-01), Roy et al.
patent: 6650641 (2003-11-01), Albert et al.
patent: 6728492 (2004-04-01), Baroncelli
patent: 6741615 (2004-05-01), Patwardhan et al.
patent: 6751743 (2004-06-01), Theodoras et al.
patent: 6754174 (2004-06-01), Ben-Zur et al.
patent: 6754217 (2004-06-01), Ahn
patent: 6791947 (2004-09-01), Oskouy et al.
patent: 6834049 (2004-12-01), Tomar et al.
patent: 6895018 (2005-05-01), Klish, II
Padmanabhan et al.; U.S. Appl. No. 09/637,709; “Systems and Methods for Packing Data into a Destination Register;” filed Aug. 15, 2000.
Padmanabhan et al.; U.S. Appl. No. 09/706,752; “Systems and Methods for Generating a Reliable Clock for Reception and Recovery of Date;” filed Nov. 7, 2000.
U.S. Appl. No. 09/751,454, filed Jan. 2, 2001; entitled “Systems and Methods for Allocating Bandwidth for Processing of Packets,” 61 pages.
U.S. Appl. No. 09/534,838, filed Mar. 24, 2000; entitled “Bandwidth Division for Packet Processing,” 31 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

High-speed line interface for networking devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed line interface for networking devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed line interface for networking devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3785520

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.