High speed level shift circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

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Details

327 52, 327 55, 327541, 326 63, 326 80, H03L 500

Patent

active

059330430

ABSTRACT:
In a level shift circuit having a bias circuit and an output circuit, the current consumption of the bias circuit can be suppressed, and further the delay of the output signal relative to the input signal can be reduced. The ratio circuit comprises a bias circuit block (5) composed of a transistor (1) connected to a high potential power source (7) and having a gate to which an input bias INBIAS is applied through a bias input terminal (11), a transistor (2) connected in series to the transistor (1) so as to function as a resistance, and a transistor (13) connected in series to the transistor (2) and a low potential power source (8); and an output circuit block (6) composed of a transistor (3) connected to the high potential power source (7) and having a gate to which an input signal IN is applied through an input terminal (10) and a drain from which an output signal OUT is derived to an output terminal (12), and a transistor (4) connected in series to the transistor (3) and a low potential power source (8). Further, a voltage VBIAS1 is applied from the drain of the transistor (1) to the gate of the transistor (4), and further a switching signal is applied from the drain of the transistor (3) to the gate of the transistor (13).

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