High speed inverting hysteresis TTL buffer circuit

Details High speed inverting hysteresis TTL buffer circuit High speed inverting hysteresis TTL buffer circuit

1990-02-01

1991-06-04

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307290, 307359, H03K 19003

Patent

active

050216872

ABSTRACT:
A TTL inverter buffer circuit is provided with a switched current that produces hysteresis in the threshold values. The current is switched on by a control circuit when the input logic is low and off when the logic is high. The control circuit receives its sense from the logic state so that when the input logic is low a high threshold is created and when the input logic is high a low threshold is created. The difference is the circuit hysteresis voltage which is dependent upon the switched current and a resistor.

REFERENCES:
patent: 4339676 (1982-07-01), Ramsey
patent: 4507575 (1985-03-01), Mori et al.
patent: 4591741 (1986-05-01), Cooper
patent: 4806787 (1989-02-01), Kato et al.
patent: 4883975 (1989-11-01), Enomoto et al.
Berger et al., "TTL Circuit with Improved Noise Margins", IBM T.D.B. vol. 19, No. 1, 6-1976, pp. 142-143.

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