High speed input receiver/latch

Details High speed input receiver/latch High speed input receiver/latch

1990-12-18

1992-05-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307530, 307291, 307279, H03K 329, H03K 326

Patent

active

051171244

ABSTRACT:
A high-speed receiver/latch is implemented by incorporating a differential amplifier/comparator directly into the feedback loop of a latch function. Both transparent and edge-triggered variants are possible. The resulting circuit is capable of extremely high-speed operation by virtue of very small setup time and small propagation delay.

REFERENCES:
patent: 4121120 (1978-10-01), Wetterling
patent: 4302689 (1981-11-01), Brodie
patent: 4689497 (1987-08-01), Umeki et al.
patent: 4733111 (1988-03-01), Fassino et al.
patent: 4999528 (1991-03-01), Keech
patent: 5004933 (1991-04-01), Widener

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