High speed input receiver and wordline driver circuit

Details High speed input receiver and wordline driver circuit High speed input receiver and wordline driver circuit

1992-09-30

1994-01-25

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518911, 307475, G11C 700

Patent

active

052821765

ABSTRACT:
An apparatus and method of increasing the speed of an input receiver circuit directly interfaces the wordlines of a memory array. The speed of the input receiver and wordline driver circuit is improved by means of an inverter and a look-ahead n-channel transistor coupled to the basic wordline driver buffer.

REFERENCES:
patent: 4953133 (1990-08-01), Kashimura

Affiliated with

Also associated with

Rating

High speed input receiver and wordline driver circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High speed input receiver and wordline driver circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed input receiver and wordline driver circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-733194