High speed I/O circuit having a small voltage swing and low powe

Details High speed I/O circuit having a small voltage swing and low powe High speed I/O circuit having a small voltage swing and low powe

1995-07-31

1996-08-27

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327 53, 327 63, 327319, 327408, H03F 345

Patent

active

055504965

ABSTRACT:
An interchip high speed I/O circuit having a low voltage swing and on-chip transmission line terminations. The present invention provides a high speed I/O circuit that uses a small voltage swing to keep power dissipation in the overall system to a minimum and particularly in the transmission line termination loads. A differential receiver circuit compares a data signal input to a reference signal, both sent from a driver chip, to determine the appropriate output response. Both the data signal and the reference signal are current controlled which reduces the di/dt noise generated by parasitic inductances.

REFERENCES:
patent: 4697095 (1987-09-01), Fujii
patent: 4756006 (1988-07-01), Rickard
patent: 4780629 (1988-10-01), Unger et al.
patent: 4945267 (1990-07-01), Galbraith
patent: 5378950 (1995-01-01), Takamoto et al.
patent: 5461333 (1995-10-01), Condon et al.

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