High-speed high-resolution ADC for precision measurements

Details High-speed high-resolution ADC for precision measurements High-speed high-resolution ADC for precision measurements

2005-11-29

2005-11-29

Young, Brian (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S155000, C341S144000

Reexamination Certificate

active

06970118

ABSTRACT:
A measurement device such as a DMM may include four basic units—an analog circuit path, an analog to digital converter (ADC), a digital filter, and an RMS computation unit. The four basic units may be operable to multiplex or to process one or more of the plurality of channels at the same time. The analog circuit path may include the necessary circuitry for the plurality of channels to couple to one or more analog signals. The analog circuit path may couple to the ADC. The ADC may be operable to receive the one or more analog signals from the analog circuit path and convert it to one or more digital signals. The ADC may include a cascaded ADC, which may include a first ADC and a second ADC. The first and the second ADC and may be able to convert analog data to digital data during a cycle. In one embodiment, the first ADC may generate a conversion result and an error signal. The second ADC may be operable to receive the error signal, digitize the error signal, and process the error signal, thus performing noise cancellation. A summation operation may combine the data from the first ADC and the processed data from the second ADC. The cascaded ADC may consist of a continuous-time 1-bit sigma-delta modulator followed by a SAR ADC. Digital output from sigma-delta modulator may be weighted and summed with the output of the SAR ADC in an FPGA.

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