High-speed, high granularity baud clock generation

Details High-speed, high granularity baud clock generation High-speed, high granularity baud clock generation

2005-11-29

2005-11-29

Patel, Jay K. (Department: 2637)

Pulse or digital communications

Synchronizers

C375S219000, C375S220000, C708S504000, C708S650000, C327S291000

Reexamination Certificate

active

06970525

ABSTRACT:
A baud clock (15) for use by a serial communication interface (67) is generated by dividing a base clock of the serial communication interface by one of a plurality of possible composite divisors (DEG). Each composite divisor is indicative of a minimum time interval by which adjacent pulses of the baud clock are to be separated, and further indicates that at least one pair of adjacent pulses within each symbol interval of the baud clock are to be separated by an extended time interval which is longer than the minimum time interval.

REFERENCES:
patent: 6163586 (2000-12-01), Hongbin Hao et al.
patent: 6366610 (2002-04-01), Loyer et al.

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