Amplifiers – With semiconductor amplifying device – Including plural amplifier channels
Reexamination Certificate
2003-03-27
2004-11-23
Nguyen, Khnah Van (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural amplifier channels
C330S12400D
Reexamination Certificate
active
06822516
ABSTRACT:
BACKGROUND
The invention generally relates to electronic amplifiers and, more particularly, to a high speed high gain amplifier having replica amplifiers for controlling operating conditions.
In the design of low cost CMOS analog processing chips the main “building block” is the CMOS operational amplifier. There are many implementations and some architectures are designed to make use of very simple amplifiers that are similar to the CMOS logic gates. See for example, “A 10-b 20-MHZ 30-mW Pipelined Interpolating CMOS ADC” IEEE Journal of Solid-State Circuits, Vol 28 No 12 Dec. 1993, Kusumoto et al. Referring to
FIG. 1
, a conventional amplifier
100
is illustrated that includes a single NMOS device M
1
101
operating at a defined drain current from current source G
1
102
, which is connected between a reference voltage vdd
104
and ground,
106
. The input signal is received at input
108
. The output signal is delivered to output
110
. This circuit is an inverting amplifier because as the input node is adjusted upward, the output node will be pulled down. This configuration is referred to as a common source amplifier. The problems associated with a circuit such as this circuit include a high output impedance and relatively low gain. A more conventional amplifier is commonly developed from this simple NMOS device by cascading a number of gain stages and by applying feedback to reduce the output impedance and increase the gain. Such a configuration has errors of the common source CMOS amplifier due to the output voltage disturbance and consequent output current change. The problem with this circuit is that a device configured with such a circuit is vulnerable to changes in operating point factors. As current is drawn by outside forces at the output of an amplifier, the input detects the change at the input via the feedback loop and draws current to correct it. This correction causes a decrease in the amplifier's gain and transconductance, as well as an increase in output impedance.
These amplifiers are also transconducting devices, which are electronic building blocks characterized by a current output derived from a voltage input in a linear relationship I
out
=G
m
*V
in
, where G
m
is the transconductance term, and where Seimens (S) is the standard unit of G
m
in Amps/Volt. Generally, the value of G
m
in a conventional amplifier is fixed and is determined by the circuit elements. Thus, the G
m
is fixed when the circuit is manufactured. It is possible, however, to vary the G
m
using programmable means on a circuit chip. In such a configuration, the G
m
could be varied by such programmable means according to a run-time configuration, rather than a predetermined configuration. These devices are used in programmable linear filters, gain amplifiers and other general purpose linear processing elements.
Therefore, there exists a need for amplifiers that have improved performance factors and that are sensitive and responsive to changes in operating conditions that affect performance. As will be seen below, the invention accomplishes improved performance factors in an elegant manner.
SUMMARY OF INVENTION
The invention provides an electronic device, such as an amplifier, having improved gain and transconductance and low output impedance. The device includes a primary amplifier configured to carry an operating load. The primary amplifier includes an input for receiving an input signal, and an output for outputting an output signal. The primary amplifier operates having a variable output, as it carries an operational load. The device further includes a secondary amplifier configured to operate at a fixed operating condition, not burdened by carrying an operational load. The secondary amplifier includes a secondary input configured to receive the input signal, wherein the secondary amplifier is configured to define the input voltage. The device is configured to detect a difference in operating current between the primary and secondary amplifiers, and to compensate for any operational load that may be applied to the primary amplifier during operation.
The device may further include an adjustment circuit configured to define a feed-forward path with the secondary amplifier. The adjustment circuit includes a comparator configured to compare the input voltage to a reference voltage of the primary comparator. The adjustment circuit is configured to adjust the output current in response to changes in voltage resulting from the operational load on the primary amplifier that may occur at the primary output. The circuit is thus configured to compensate for voltage fluctuations occurring in operation of the primary amplifier.
REFERENCES:
patent: 4319199 (1982-03-01), Sunderland
patent: 5621374 (1997-04-01), Harkin
patent: 6285251 (2001-09-01), Dent et al.
patent: 6700440 (2004-03-01), Hareyama
ESS Technology, Inc.
Nguyen Khnah Van
Stevens Law Group P.C.
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