High speed, high common mode range, low delay comparator...

Details High speed, high common mode range, low delay comparator... High speed, high common mode range, low delay comparator...

2002-12-09

2004-03-09

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S563000, C327S066000

Reexamination Certificate

active

06703872

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to electronic systems and in particular it relates to a comparator input stage.
BACKGROUND OF THE INVENTION
One of the main problems with prior art comparators is the large common mode variation at the input stage of the comparator. This stage needs to support a common mode of 0.6V to 2.1V, with a differential swing as low as +/−25 mV. The next important point is the large variation in the supply voltage that the comparator should tolerate. For example, the supply voltage can vary from 2.7V to 3.6V.
To support the large common mode at the input (in the 1.8 v/3.3 v process) the supply must be 3.3 v. Hence, conventionally 3.3V transistors would be used as the input pair. Such transistors have a large threshold voltage (Vt), which prevents the N channel input pair from supporting a low common mode of 0.6V. If 1.8V transistors are instead used as the input pair, a lower common mode may be achieved, but the circuit shows reliability problems due to the use of a 3.3V supply.
In one prior art method used to solve the above problem, the input pair consists of two pairs of 3.3V transistors. One of the pairs consists of N channel input transistors, and the other pair consists of P channel input transistors. Depending on the common mode, the correct pair comes into operation. The problem with this method is that an extra comparator for every input is required.
Another prior art method is to use 1.8V N-channel input pair transistors with a resistor in the common current path, which drops a suitable amount of voltage across it. This method has its difficulties in this specific case because of the large power supply variation (the supply itself varies by 0.9V). This in effect means that it is impossible to determine the correct amount of voltage to be dropped across this resistor. If this dropped voltage is selected to be too small (for example ~0.4V or less), then for the supply voltage of 3.6V, there is still a reliability problem. On the other hand, if a larger value is dropped across the resistance, a curtailed common mode range is a problem at the higher end for a 2.7V supply voltage. Also, the output common mode of this stage is a function of the supply voltage and thus varies greatly.
Another prior art solution is a regulator with a 1.8V N-channel input pair. The regulator (closed loop, with an op-amp) is used to generate a suitable voltage (for example 2.4V) which is such a value as to not cause the reliability problem but at the same time not limit the upper side of the common mode range. This voltage is used as the supply for the comparator. However, this method requires the design of a dedicated regulator in closed loop for the comparator.
SUMMARY OF THE INVENTION
A comparator input stage uses low voltage transistors
20
and
21
as the input pair. They have a small threshold voltage, and hence support a low common mode. The circuit includes a current sink
22
coupled to the input pair
20
and
21
; a first resistor
33
coupled between a first branch of the input pair and a voltage node V
24
; a second resistor
36
coupled between a second branch of the input pair and the voltage node V
24
; a first transistor
23
coupled to the voltage node V
24
; a second transistor
24
having a gate coupled to a gate of the third transistor
23
; a third resistor
32
coupled to a first end of the second transistor
24
; and a current source
29
coupled to a second end of the second transistor
24
for controlling a voltage across the third resistor
32
wherein the voltage across the third resistor
32
sets a voltage at the voltage node V
24
. This voltage at the voltage node V
24
serves as an open loop regulation for protection of the input pair transistors
20
and
21
.


REFERENCES:
patent: 5451898 (1995-09-01), Johnson
patent: 6018261 (2000-01-01), Alford et al.

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