High-speed half-flash type analog/digital converter

Details High-speed half-flash type analog/digital converter High-speed half-flash type analog/digital converter

1990-10-01

1992-03-03

Pellinen, A. D.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341159, H03M 114

Patent

active

050936646

ABSTRACT:
An analog/digital converter supplying logic words constituted by P high order bits and Q low order bits, comprises: a divider (2), 2.sup.P high weight comparators (5), 2.sup.Q low weight comparators (11), and a selector (14). The high weight comparators have their second inputs (E21) enabled by the clock signal (H) and their first inputs (E11) enabled by the reverse clock signal (H.sup.*). The low weight comparators have their first inputs (E12) enabled by the reverse clock signal (H.sup.*) and their second inputs (E22) enabled by the clock signal (H).

REFERENCES:
patent: 4533903 (1985-08-01), Yamada et al.
patent: 4745393 (1988-05-01), Tsukada et al.
patent: 4912470 (1990-03-01), Hosotani et al.
patent: 4999630 (1991-03-01), Masson
Matsuura et al., "An 8b 20MHz CMOS Half-Flash A/D Converter", 1988 IEEE Solid-State Circuits Conference, Feb. 17-19, New York, N.Y., pp. 220, 221, 376.

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