High speed full adder

Details High speed full adder High speed full adder

1988-09-12

1989-09-12

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 750

Patent

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048666580

ABSTRACT:
A high speed full adder circuit is shown to include logic circuitry responsive to the levels of the two digital signals to be added for: (a) immediately producing an appropriate carry signal when the levels of the digital signals are the same; and (b) inverting the carry signal into such adder when the levels of the digital signals differ.

REFERENCES:
patent: 4052604 (1977-10-01), Maitland et al.
patent: 4417314 (1983-11-01), Best
patent: 4425623 (1984-01-01), Russell
patent: 4471454 (1984-09-01), Dearden et al.
patent: 4523292 (1985-06-01), Armer
patent: 4621338 (1986-11-01), Uhlenhoff
Article entitled "LSI'S for Digital Signal Processing", by N. Ohwada, T. Kimura and M. Doken, IEEE Journal of Solid-State Circuits, vol. SC-14, No. 2, Apr. 1979, pp. 214-220.

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