Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate
2009-05-21
2011-12-20
Moore, Jr., Michael J (Department: 2467)
Multiplex communications
Data flow congestion prevention or control
Control of data admission to the network
C370S392000
Reexamination Certificate
active
08081570
ABSTRACT:
A method and apparatus for controlling data flow across a network performs a method which includes transmitting a packet request message from a first station to a second station, then determining if the packet request message is valid. A request acknowledge message is transmitted from the second station to the first station, and it is then determined if the request acknowledge message is valid. The packet request message and the request acknowledge message each includes a control bit string, an identification bit string, and at least one parity bit.
REFERENCES:
patent: 5278789 (1994-01-01), Inoue et al.
patent: 5390173 (1995-02-01), Spinney et al.
patent: 5414704 (1995-05-01), Spinney
patent: 5423015 (1995-06-01), Chung
patent: 5459717 (1995-10-01), Mullan et al.
patent: 5473607 (1995-12-01), Hausman et al.
patent: 5499295 (1996-03-01), Cooper
patent: 5524254 (1996-06-01), Morgan et al.
patent: 5555398 (1996-09-01), Raman
patent: 5568477 (1996-10-01), Galand et al.
patent: 5579301 (1996-11-01), Ganson et al.
patent: 5644784 (1997-07-01), Peek
patent: 5652579 (1997-07-01), Yamada et al.
patent: 5696899 (1997-12-01), Kalwitz
patent: 5742613 (1998-04-01), MacDonald
patent: 5748631 (1998-05-01), Bergantino et al.
patent: 5774673 (1998-06-01), Beuk et al.
patent: 5781549 (1998-07-01), Dai
patent: 5781745 (1998-07-01), Ramelson et al.
patent: 5787084 (1998-07-01), Hoang et al.
patent: 5790539 (1998-08-01), Chao et al.
patent: 5802052 (1998-09-01), Venkataraman
patent: 5802287 (1998-09-01), Rostoker et al.
patent: 5825772 (1998-10-01), Dobbins et al.
patent: 5828653 (1998-10-01), Goss
patent: 5831980 (1998-11-01), Varma et al.
patent: 5842038 (1998-11-01), Williams et al.
patent: 5845081 (1998-12-01), Rangarajan et al.
patent: 5887187 (1999-03-01), Rostoker et al.
patent: 5892922 (1999-04-01), Lorenz
patent: 5898687 (1999-04-01), Harriman et al.
patent: 5909686 (1999-06-01), Muller et al.
patent: 5918074 (1999-06-01), Wright et al.
patent: 5940596 (1999-08-01), Rajan et al.
patent: 5987507 (1999-11-01), Creedon et al.
patent: 6011795 (2000-01-01), Varghese et al.
patent: 6041053 (2000-03-01), Douceur et al.
patent: 6061351 (2000-05-01), Erimli et al.
patent: 6104749 (2000-08-01), Lu
patent: 6119196 (2000-09-01), Muller et al.
patent: 6175902 (2001-01-01), Runaldue et al.
patent: 6185185 (2001-02-01), Bass et al.
patent: 6263001 (2001-07-01), Banks
patent: 6289016 (2001-09-01), Subbiah
patent: 6337852 (2002-01-01), Desnoyers et al.
patent: 6457146 (2002-09-01), Keen
patent: 6611495 (2003-08-01), Meyer
patent: 7539134 (2009-05-01), Bowes
patent: 2001/0030943 (2001-10-01), Gregg
patent: 2003/0133448 (2003-07-01), Frink
patent: 0312917 (1989-04-01), None
patent: 0465090 (1992-01-01), None
patent: 0752796 (1997-01-01), None
patent: 0849917 (1998-06-01), None
patent: 0853441 (1998-07-01), None
patent: 0854606 (1998-07-01), None
patent: 0859492 (1998-08-01), None
patent: 0862349 (1998-09-01), None
patent: 0907300 (1999-04-01), None
patent: 2725573 (1996-04-01), None
patent: 4-189023 (1992-07-01), None
patent: 9809473 (1998-03-01), None
patent: 9900938 (1999-01-01), None
patent: 9900939 (1999-01-01), None
patent: 9900944 (1999-01-01), None
patent: 9900945 (1999-01-01), None
patent: 9900948 (1999-01-01), None
patent: 9900949 (1999-01-01), None
patent: 9900950 (1999-01-01), None
Tanenbaum, A. S., “Computer Networks”, Prentice-Hall Int., USA, XP-002147300, Sec.5.2-Sec.5.3, Routing Algorithms and Congestion Control Algorithms,(1998), pp. 309-320.
Harufusa, Kondoh et al., “A 622-Mb/s 8×8 ATM switch chip set with shared multibuffer architecture”, 8107 IEEE Journal of solid-state circuits 28, vol. 7, (1993), pp. 808-814.
Lin, Yu-Sheng et al., “Queue Management for shared buffer and shared multi-buffer ATM switches”, Department of electronics engineering & institute of electronics, National ChiaoTung University, Hsinchu, Taiwan, R.O.C.,(Mar. 24, 1996), pp. 688-695.
Catalyst 8500 CSR Architecture, White PaperXP-002151999, Cisco Systems Inc, (1998), pp. 1-19.
Local Area Network Switch Frame Lookup Techniquefor Increased Speed and Flexibility, 700 IBM Technical Disclosure Bulletin vol. 38, No. 7, Armonk, NY, US, (Jul. 1995), pp. 221•222.
Chemarin, Alain et al., “A High-Speed CMOS Circuit for 1.2-Gb/s 16 × 16 ATM Switching”, 8107 IEEE Journal of Solid-State Circuits, vol. 27, No. 7, NewYork, US, (Jul. 1992), pp. 1116-1120.
Macleod, K. et al., “Enhanced Flow Control for 802.3 Links Utilizing Extensions of 802.3× Flow Control”, IEEE 802 Exec Study Group on QOS and Flow Control, XP002178211,(Nov. 11, 1998), pp. 1-11.
Broadcom Corporation
Moore, Jr. Michael J
LandOfFree
High speed flow control methodology does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High speed flow control methodology, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed flow control methodology will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4313820