High speed flip-flop

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S200000, C327S201000

Reexamination Certificate

active

06737898

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to bistable electronic circuits and, more particularly, to a high speed flip-flop.
Flip-flops have many applications in electronic systems. Speed of operation and power efficiency are important characteristics of a flip-flop.
A flip-flop can be controlled by a clock to operate upon a data stream as a latch. A dynamic latch generally is capable of operating at a higher speed and with lower power consumption than a static latch. On the other hand, a static latch is generally more stable than a dynamic latch. In short, both dynamic and static latches have favorable and unfavorable characteristics that need to be compromised in circuit design.
SUMMARY OF THE INVENTION
According to the invention, a bistable device has first and second complementary input terminals and first and second bistable states that are determined by the polarity of the signal applied to one of the input terminals. A source of an uninverted binary input signal, preferably an uninverted data stream, has a first value or a second value. A source of an inverted binary input signal, preferably an inverted data stream, has a first value or a second value in complementary relationship to the values of the uninverted input signal. A first source of a trigger signal has one polarity. A second source of a trigger signal has the other polarity. The trigger signals could be the bias potential supplies for the transistors of the bistable device. The first trigger signal is applied to the first input terminal and the second trigger signal is applied to the second input terminal to drive the bistable device into the first stable state when the input signal has the first value. The first trigger signal is applied to the second input terminal and the second trigger signal is applied to the first input terminal to drive the bistable device into the second stable state when the input signal has the second value. As a result, the bistable device is triggered in push-pull fashion responsive to the binary input signal.
A feature of the invention is a latch that can be converted between a dynamic mode and a static mode. Cross-coupled connections are formed between the output of a first bistable stage and the input of a second bistable stage and between the input of the second bistable stage and the output of the first bistable stage so that the first and second stages are alternately cut off or float. Preferably, cross-coupled connections are also formed between the output of a third bistable stage and the input of a fourth bistable stage and between the output of the fourth bistable stage and the input of the third bistable stage so that the third and fourth stages are alternately cut off or float. The first and second stages are conditionally connected in parallel and the second and fourth stages are conditionally connected in parallel to form a static latch when the connection is in place and a dynamic latch when the connection is not in place. By controlling the conditional connections, the latch can be converted between a static mode and a dynamic mode.


REFERENCES:
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patent: 5111078 (1992-05-01), Miyamoto et al.
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patent: 5384493 (1995-01-01), Furuki
patent: 5491667 (1996-02-01), Sharp
patent: 5526314 (1996-06-01), Kumar
patent: 5903171 (1999-05-01), Shieh
patent: 6052328 (2000-04-01), Turnullo, Jr. et al.
patent: 6556059 (2003-04-01), Afghahi
patent: 0 440 514 (1991-08-01), None
patent: 0 793 342 (1997-09-01), None
International Search Report dated Jan. 14, 2002 from PCT/US00/42634.
Written Opinion dated Apr. 17, 2002 from PCT/US00/42634.

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