High speed FET employing ternary and quarternary III-V active la

Details High speed FET employing ternary and quarternary III-V active la High speed FET employing ternary and quarternary III-V active la

1976-03-29

1978-02-21

Larkins, William D.

357 3, 357 15, 357 16, 357 61, 357 64, H01L 29203, H01L 2980, H01L 4700

Patent

active

040756513

ABSTRACT:
A field effect transistor (FET) preferably employs an epitaxial layer of indium gallium arsenide as its active layer. On the surface of the active layer, ohmic source and drain contacts are spaced from respectively opposite sides of a Schottky barrier (rectifying) gate electrode. The active layer is grown over an epitaxial transition layer which is graded from gallium arsenide to indium gallium arsenide and is doped with chromium or oxygen to be semi-insulating. The transition layer is in turn formed over a bulk, intrinsic layer of gallium arsenide. High speed operation of the FET is obtainable because the active layer has excellent electron transport characteristics. Other materials suitable for the active layer are indium arsenide phosphide and indium gallium arsenide phosphide.

REFERENCES:
patent: 3289052 (1966-11-01), Mead
patent: 3696262 (1972-10-01), Antypas
patent: 3745427 (1973-07-01), Hilsnm et al.
patent: 3914784 (1975-10-01), Hunsperger et al.
patent: 3977015 (1976-08-01), Irving et al.
patent: 3982261 (1976-09-01), Antypas
Maloney et al., IEEE Int. Electron Dev. Meeting, Dec. 1974, Technical Digest pp. 296-298.

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