High speed EPROM with reverse polarity voltages applied to sourc

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518908, 365182, 357 235, G11C 1604, G11C 1606

Patent

active

050162152

ABSTRACT:
An EPROM memory cell (32) stores information in a floating gate (44) which overlies a portion of a channel between a program drain (36) and a read drain (34). A control gate (46) has a lower segment (48) which overlies the portion of the channel not covered by the floating gate (44), and has an upper portion (50) overlying the floating gate (44). During a program operation, electrons flow from the read drain (34), acting as a source, to the program drain (36), and hot electrons are stored within the floating gate (44). During a read operation, electrons flow from the programming drain (36) to the read drain (34), and the majority of hot electrons drift to the control gate (46). Since the hot electrons do not enter the floating gate (44) during read operations, a higher driving current can be used, thereby increasing the speed at which the EPROM memory cell (32) is read.

REFERENCES:
patent: 4173791 (1979-11-01), Bell
patent: 4282446 (1981-08-01), McElroy
patent: 4336603 (1982-06-01), Kotecha et al.
patent: 4366555 (1982-12-01), Hu
patent: 4409723 (1983-10-01), Harari
patent: 4617479 (1986-10-01), Hartmann et al.
patent: 4639893 (1987-01-01), Eitan
patent: 4665418 (1987-05-01), Mizutani
patent: 4698787 (1987-06-01), Mukherjee et al.
patent: 4797856 (1989-01-01), Lee et al.
"Waferscale's 256K EPROM runs Superfast", Electronics, Jul. 9, 1987, pp. 65 and 66.

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