Static information storage and retrieval – Floating gate – Particular biasing
Patent
1985-07-01
1987-05-05
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
365189, 357 235, G11C 1134
Patent
active
046637400
ABSTRACT:
A high speed EPROM cell comprises two floating gate field effect transistors and one field effect transistor. One of the floating gate transistors is smaller than the other floating gate transistor and functions as a programming transistor in developing charge on the interconnected floating gates. The larger dimensions of the other floating gate transistor allows increased read current and operating speed. The field effect transistor connects the larger floating gate transistor to a read drain terminal. The cell is readily fabricated using two doped polycrystalline semiconductor lines and two metallization lines in accordance with conventional semiconductor processing techniques.
REFERENCES:
patent: 4402064 (1983-08-01), Arakawa
Popek Joseph A.
Silicon Macrosystems Incorporated
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