High speed emulation of arithmetic operations

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Details

C708S495000

Reexamination Certificate

active

06647401

ABSTRACT:

A portion of the disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
FIELD OF THE INVENTION
The subject invention relates generally to computer systems and more particularly to a process for increasing the speed of arithmetic operations in a system where emulation software is employed to cause a plurality of microprocessors to emulate a prior art mainframe computer.
BACKGROUND OF THE INVENTION AND RELATED ART
In the past, emulation software has been employed together with a number of microprocessor chips to emulate mainframe hardware. Such emulation software is comprised of many processes, each of which emulates a piece of prior art hardware, such as a central processor, an I/O processor or a task control unit. Emulation of arithmetic operations poses a particular problem in that the format used to represent numbers in a mainframe computer may be incompatible with the format used by the microprocessor. As a result, a long series of time consuming steps has conventionally been used to perform what desirably should be relatively simple and quick one-instruction arithmetic operations.
SUMMARY OF THE INVENTION
The invention provides a method of quickly converting numbers from mainframe format to that used by the microprocessor. The microprocessor is then instructed to perform a selected arithmetic operation on the converted numbers. The result of the arithmetic operation is then converted back to mainframe format for further processing. The arithmetic operations may include addition, subtraction, multiplication or division.
The particular example or embodiment of the invention disclosed hereinafter concerns microprocessor-implemented conversion of numbers from a particular main frame format known as “e-mode” to a standard IEEE double format. Arithmetic operations are then performed on the IEEE doubles with the result being converted back to e-mode format.
Various objects, features and advantages of the present invention will become readily apparent to those skilled in the art from the following detailed description, wherein is shown and described only the preferred embodiment of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive, and what is intended to be protected by Letters Patent is set forth in the appended claims. The present invention will become apparent when taken in conjunction with the following description and attached drawings, wherein like characters indicate like parts, and which drawings form a part of this application.


REFERENCES:
patent: 5161117 (1992-11-01), Waggener, Jr.
patent: 5687106 (1997-11-01), Schwarz et al.
patent: 5889980 (1999-03-01), Smith, Jr.

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