High speed ECL to TTL translator having a non-Schottky clamp for

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307310, 3072993, 307549, 307552, H03K 19013

Patent

active

050013700

ABSTRACT:
A high speed voltage translator is responsive to an ECL input signal for providing a TTL output signal at an output while clamping the low output voltage thereof to a predetermined value. The ECL input signal is converted to first and second complementary control signals for driving the upper and lower transistors in the output stage, respectively. The second control signal enables a third transistor, the base of which is connected via a serial diode and resistor combination to a second collector of the lower transistor in the output stage. The base-emitter junction potential of the third transistor cancels the potential across the diode whereby the collector of the lower transistor that is the output of the voltage translator is clamped at one base-emitter junction potential less the voltage across the resistor. Furthermore, the current flowing through the resistor is compensated for temperature variation whereby the low output voltage is independent of temperature. The first and second control signals enable separate charge and discharge paths for the upper and lower transistors whereby the associated propagation delays may be controlled so as to inhibit simultaneous conduction through the output stage.

REFERENCES:
patent: 4131808 (1988-12-01), Kuo
patent: 4255670 (1981-03-01), Griffith
patent: 4514651 (1985-04-01), Miller et al.
patent: 4678940 (1987-07-01), Vasseghi
patent: 4835420 (1989-05-01), Rosky
patent: 4857776 (1989-08-01), Khan

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