High-speed ECL synchronous logic circuit with an input logic cir

Details High-speed ECL synchronous logic circuit with an input logic cir High-speed ECL synchronous logic circuit with an input logic cir

1983-07-29

1985-12-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307291, 307443, 307455, H03K 3289

Patent

active

045608881

ABSTRACT:
An input logic circuit has a plurality of pairs of bipolar transistors. The bases of each pair of transistors receive a logic signal and its inverted signal, respectively, and the emitters thereof are coupled to each other. A signal transfer circuit has a pair of bipolar transistors the emitters of which are coupled to each other and the bases of which respectively receive an output signal and its inverted output signal from the input logic circuit. The signal transfer circuit is operated in response to a synchronizing signal. A signal hold circuit has a pair of bipolar transistors arranged such that their emitters are connected to each other, their bases and collectors are cross-coupled, and their bases respectively receive an output signal and its inverted output signal from the signal transfer circuit. The signal hold circuit is operated in response to the synchronizing signal. The signal transfer circuit and the signal hold circuit constitute an ECL synchronous latch.

REFERENCES:
patent: 3917961 (1975-11-01), Reed
patent: 3996478 (1976-12-01), Kasperkovitz
patent: 4041326 (1977-08-01), Robinson
patent: 4237387 (1980-12-01), Devendorf et al.
patent: 4309625 (1982-01-01), Takahashi

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