Communications: electrical – Digital comparator systems
Patent
1975-02-19
1976-02-10
Hecker, Stuart N.
Communications: electrical
Digital comparator systems
307203, 340173DR, G11C 706, G11C 800
Patent
active
039381099
ABSTRACT:
A metal-oxide-silicon (MOS), random-access memory (RAM) which is emitter-coupled logic (ECL) compatible and which does not require any high level clock inputs. The memory utilizes pseudo-static cells which are refreshed with an asynchronous charge-pump signal generated on the memory chip. Buffers utilize the ECL reference signal to assure ECL compatibility. The memory employs dynamic decoding in two separate levels of decoding.
REFERENCES:
patent: 3778784 (1973-12-01), Karp et al.
Geilhufe, More bits/chip leads to economical semiconductor memory systems, EDN, 2/20/73, pp. 76-81.
Ebel Mark S.
Gionis John
Regitz William M.
Hecker Stuart N.
Intel Corporation
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