High speed early/late discrimination systems and methods for...

Details High speed early/late discrimination systems and methods for... High speed early/late discrimination systems and methods for...

2008-05-20

2008-05-20

Payne, David C. (Department: 2611)

Pulse or digital communications

Synchronizers

C375S355000

Reexamination Certificate

active

10766161

ABSTRACT:
The present invention facilitates clock and data recovery for serial data streams by providing a mechanism that can be employed to detect and adjust operation and timing of clocks. The invention employs a differential analog circuit, using current steering logic, to process center and edge samples and identify an average operation of the clocks. The circuit can identify transitions between adjacent center/edge data samples and determine whether an identified transition is early or late for each bit in a set of consecutive bits of a received serial data stream.

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