High speed dynamic range extension employing a synchronous digit

Coded data generation or conversion – Analog to or from digital conversion – Nonlinear

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341132, H03M 118

Patent

active

058283285

ABSTRACT:
An high speed apparatus and method for extending a dynamic range of a signal processing device which receives an analog input signal. A peak indicator uses a 90.degree. phase shifter and zero crossing detector to indicate when the analog input signal is at a peak amplitude within each of its cycles, and an analog to digital converter (ADC) samples input signal amplitude when each peak amplitude is indicated to provide a digital control word for each sampled peak. A gain controller adjusts the gain of the analog input signal provided to the signal processing device in response to the digital word. Preferably the ADC calculates log.sub.2 of the sampled peak amplitude so that the digital word is a power-of-two operator, the gain controller compresses the analog input signal by a factor of one over the power-of-two, and the output signal from the signal processing device is thereafter expanded by a data shifter which shifts the output by an amount corresponding to the power-of-two.

REFERENCES:
patent: 3851309 (1974-11-01), Kenney et al.
patent: 4398061 (1983-08-01), McMann, Jr.
patent: 4947133 (1990-08-01), Thomas
patent: 5343200 (1994-08-01), Matsui
patent: 5631647 (1997-05-01), Yamada et al.

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