Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-09-14
1990-01-23
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307450, 307453, 307481, H03K 19096
Patent
active
048960578
ABSTRACT:
A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implementing the logic function. A pair of FETs are connected to provide an output inverter with two series diodes for level shift. A coupling capacitor may be employed with a further FET to provide level shifting required between the inverter and the logic circuit output terminal. These circuits may be cascaded to form a domino chain.
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Deming, et al., "A Gallium Arsenide Configurable Cell Array Using Buffered FET Logic", IEEE Journal of Solid-State Circuits, Vol. SC-19, No. 5, pp. 728-738, October, 1984.
Krambeck, et al., "High-Speed Compact Circuits with CMOS", IEEE Journal of Solid-State Circuits, Vol. SC-17, No. 3, pp, 614-619, Jun., 1982.
D'avanzo, D. C., "Proton Isolation for GaAs Integrated Circuits", IEEE Trans. on Electron Devices, Vol. ED-29, No. 7, pp. 1051-1059, Jul., 1982.
Long Stephen I.
Yang Long
Glenn Charles E. B.
Hudspeth David
Jones Thomas H.
Manning John R.
United States of America as represented by the Administrator, Na
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