Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1994-04-29
1997-01-07
Hoff, Marc S.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
341118, H03M 150
Patent
active
055921680
ABSTRACT:
A unified zero-reset phase is used in a dual-slope analog-to-digital converter (ADC) to: (1) derive a correction voltage to cancel any error due to offset and/or residue voltages in the components of the ADC in the subsequent integration phase and the de-integration phase; (2) reset the output of the integrator in the ADC to zero quickly when there is a overflow condition due to excessive analog input signals. The combined function is accomplished by negative feedback from the output of the comparator to the input of the buffer. The negative feedback resets the integrator output to zero quickly under overflow condition. The correction voltage is stored in the integrating capacitor and a coupling capacitor to the integrating amplifier.
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Hoff Marc S.
Industrial Technology Research Institute
Lin Patent Agent H. C.
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