High-speed dot matrix output apparatus

Details High-speed dot matrix output apparatus High-speed dot matrix output apparatus

1995-06-06

1997-05-13

Evans, Arthur G.

395110, G06K 1500

Patent

active

056300310

ABSTRACT:
An output apparatus having a dot matrix memory and a non-dot-matrix memory, and a method applicable to such an apparatus, in which the dot matrix memory stores an externally entered download font for converting code data into dot matrix data, and in which the non-dot-matrix memory stores non-dot-matrix data for converting code data into non-dot-matrix data and then into dot matrix data. When code is received, the two mentioned memories are controlled so as to have priority in the order: dot matrix memory, then non-dot-matrix memory, to obtain a desired dot pattern in response to the received code data.

REFERENCES:
patent: 4488245 (1984-12-01), Dalke et al.
patent: 4660998 (1987-04-01), Tsuneki
patent: 4715006 (1987-12-01), Nagata
patent: 4734703 (1988-03-01), Sasaki
patent: 4734707 (1988-03-01), Sasaki
patent: 4837712 (1989-06-01), Shibamiya
patent: 4881180 (1989-11-01), Nishiyama
patent: 4901249 (1990-02-01), Shiota
IBM Technical Disclosure Bulletin, vol. 28, No. 11, Apr. 1986, p. 5003.

Affiliated with

Also associated with

Rating

High-speed dot matrix output apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed dot matrix output apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed dot matrix output apparatus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1392457