Boots – shoes – and leggings
Patent
1995-12-13
1998-08-25
Elmore, Reba I.
Boots, shoes, and leggings
36474806, 364752, 364761, G06F 738, G06F 752
Patent
active
057989559
ABSTRACT:
A calculation unit speedily calculates a division or square root according to an iteration algorithm with a partial remainder expressed with the sum of a sum digit and carry digit. The calculation unit has a quotient selection logic circuit. The quotient selection logic circuit at least has an adder for adding higher three bits of the sum digit to higher three bits of the carry digit, an OR gate for providing the OR of the fourth bits of the sum and carry digits, and a quotient digit determination block for determining the next quotient digit according to the outputs of the adder and OR gate.
REFERENCES:
patent: 4939686 (1990-07-01), Fandrianto
patent: 5001664 (1991-03-01), Makita et al.
patent: 5237525 (1993-08-01), Rossbach
patent: 5404324 (1995-04-01), Colon-Bonet
patent: 5638314 (1997-06-01), Yoshida
Majerski, "Square-Rooting Algorithms for High-Speed Digital Circuits", IEEE Transactions on Computers, vol. C-34, No. 8, pp. 724-732, Aug. 1985.
Ercegovac et al., "On-the-Fly Conversion of Redundant into Conventional Representations", IEEE Transactions on Computers, vol. C-36, No. 7, pp. 895-897, Jul. 1987.
Fandrianto, "Algorithm for High Speed Shared Radix 4 Division and Radix 4 Square-Root", pp. 73-79, IEEE 1987.
Ercegovac et al., "A Division Algorithm With Prediction of Quotient Digits", IEEE Computer Society Press, pp. 51-56, (1985).
Montuschi et al., "Reducing Iteration Time When Result Digit is Zero for Radix 2 SRT Division and Square Root with Redundant Remainders", IEEE Transactions on Computers, vol. 42(2):239-246, (1993).
Nienhaus et al., "A Parallel SRT Divider for Systolic Linear System Solvers", Electrical and Electronics Engineers, vol. 3, pp. 1361-1365 (1989).
Majerski, "Square-Rooting Algorithms for High-Speed Digital Circuits", IEEE Transactions on Computers, vol. C-34(8):724-733, (1985).
Elmore Reba I.
Kabushiki Kaisha Toshiba
Moise Emmanuel L.
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