Boots – shoes – and leggings
Patent
1980-10-29
1983-04-26
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
043815502
ABSTRACT:
Logic circuit hardware is provided for dividing a binary fraction divisor into a smaller binary fraction dividend to provide a binary fraction quotient.
Initially, the divisor is stored in a storage register with its sign in the highest order bit position and remains unchanged during the division operation. Initially, the dividend is stored in a dividend shift register and is shifted left one bit before being applied to a parallel adder to perform a partial divide operation. A clock signal is provided to time the division operations, wherein, the stored dividend is added to the stored divisor in a parallel binary adder. When the highest order or sign bit of the adder is positive, the sum of the dividend and the divisor are stored in the dividend register and a binary one is stored in a quotient register. When the highest order or sign bit of the adder is negative, the dividend register is shifted left and a binary zero is filled in the quotient register. Control means, including clock means, are connected logically to effect the division operation and data transfer without software implementation.
REFERENCES:
patent: 3064896 (1962-11-01), Carroll et al.
patent: 3492468 (1970-01-01), Frye
patent: 4238833 (1980-12-01), Ghest et al.
Majithia et al, "A Low-Cost Binary Division Circuit for Digital Instrumentation", IEEE Trans. on Instrumentation and Measurement, vol. 1M-23, No. 1, Mar. 1974, pp. 32-35.
Sanyal, "An Algorithm for Nonrestoring Division", Computer Design, May 1977, pp. 124-127.
Grace Kenneth T.
Malzahn David H.
Sowell John B.
Sperry Corporation
Truex Marshall M.
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