High speed digital programmable frequency divider

Details High speed digital programmable frequency divider High speed digital programmable frequency divider

1988-10-31

1990-08-21

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Starting, stopping, presetting or resetting the counter

Counter chains with a radix or base other than the number...

377105, 377118, 377 72, 377 79, H03K 2344, H03K 2348

Patent

active

049513036

ABSTRACT:
A high speed digital programmable frequency divider (100) capable of frequency division by even and odd integers is disclosed herein. The frequency divider (100) of the present invention includes a waveform generator (200) for providing a periodic input waveform of a first period and the inverse thereof. The present invention further includes a clocked ring oscillator circuit (400) for providing first and second closed signal paths, in response to the input waveform, disposed to invert signals passing therethrough. The first and second signal paths have a common output node (499) and first and second propagation delays substantially equal to first and second integral multiples of the first period, respectively. In addition, the frequency divider (100) includes a programmable switch network (500) for opening the first and second signal paths to provide a periodic output waveform at the output node (499).

REFERENCES:
patent: 3678398 (1972-07-01), Thomenius
patent: 3945194 (1976-03-01), Gollinger
patent: 3946255 (1976-03-01), Stein
patent: 3992635 (1976-11-01), Suzuki et al.
patent: 4041403 (1977-08-01), Chiapparoli
patent: 4181861 (1980-01-01), Maehashi
patent: 4193037 (1980-03-01), Kyu
patent: 4584698 (1986-04-01), Sibigtroth et al.

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