High speed digital path for successive approximation...

Details High speed digital path for successive approximation... High speed digital path for successive approximation...

2006-04-11

2006-04-11

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

07026975

ABSTRACT:
High speed digital path for successive approximation analog-to-digital converters wherein the successive approximation registers and the switch drivers are combined in set-reset latches having the switch drivers as latch outputs. This reduces the time of each successive approximation by reducing the ripple through time of each stage, thereby increasing the speed of operation of the analog-to-digital converters. As an option, the set-reset latches having the switch drivers as latch outputs may also incorporate level shifting to combine each stage of the successive approximation register, associated switch drivers and level shifters into a single circuit for each stage of the analog-to-digital converter. Various embodiments are disclosed.

REFERENCES:
patent: 4553128 (1985-11-01), Pilost
patent: 4940983 (1990-07-01), Phillips et al.
patent: 6559789 (2003-05-01), Somayajula
Grebene, Alan B., “Bipolar and MOS Analog Integrated Circuit Design”, 1984, Micro-Linear Corporation, Sunnyvale, California, pp. 853-855, no month.

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